Job Description
Join Nexus Systems Inc. at the forefront of technological evolution as we architect quantum computing infrastructure for 2026. We're seeking a visionary Quantum Computing Infrastructure Architect to design and implement next-generation systems that will revolutionize industries. This role demands a blend of deep technical expertise and strategic foresight to build scalable quantum solutions that push the boundaries of computational power.
As a key member of our Future Technologies division, you'll collaborate with Nobel laureates and industry pioneers to develop quantum-safe protocols, hybrid quantum-classical architectures, and error-corrected quantum networks. The ideal candidate thrives in ambiguity and possesses the rare ability to translate theoretical quantum principles into practical enterprise solutions.
Responsibilities
- Design fault-tolerant quantum computing architectures supporting 1000+ qubit systems
- Develop hybrid quantum-classical integration frameworks for enterprise applications
- Implement quantum-safe cryptographic protocols for 2026 security standards
- Create error correction methodologies for industrial-scale quantum processors
- Architect quantum cloud infrastructure supporting multi-tenant quantum services
- Lead cross-functional teams in quantum algorithm optimization and implementation
- Establish quantum system monitoring and predictive maintenance protocols
Qualifications
- PhD in Quantum Computing, Physics, or Computer Science with 5+ years industry experience
- Expertise in quantum error correction and fault-tolerant design principles
- Proven track record implementing quantum algorithms on real hardware (IBM, Rigetti, IonQ)
- Proficiency in quantum programming languages (Qiskit, Cirq, Quipper)
- Deep understanding of quantum cryptography and post-quantum security frameworks
- Experience with hybrid quantum-classical system integration (AWS Braket, Azure Quantum)
- Published research in peer-reviewed quantum computing journals
- Strong background in distributed systems and high-performance computing architectures